Part of Advances in Neural Information Processing Systems 11 (NIPS 1998)
Gert Cauwenberghs, James Waskiewicz
We present an analog VLSI cellular architecture implementing a simpli(cid:173) . fied version of the Boundary Contour System (BCS) for real-time image processing. Inspired by neuromorphic models across several layers of visual cortex, the design integrates in each pixel the functions of sim(cid:173) ple cells, complex cells, hyper-complex cells, and bipole cells, in three orientations interconnected on a hexagonal grid. Analog current-mode CMOS circuits are used throughout to perform edge detection, local inhi(cid:173) bition, directionally selective long-range diffusive kernels, and renormal(cid:173) izing global gain control. Experimental results from a fabricated 12 x 10 pixel prototype in 1.2 J-tm CMOS technology demonstrate the robustness of the architecture in selecting image contours in a cluttered and noisy background.